1. Field of the Invention
The invention relates generally to the field of multiprocessor, shared resource computer systems. More particularly, the invention relates to computer systems that include one or more adapters containing Random Access Memory (RAM) connected by an Input/Output (I/O) bus to one or more processors within the computer system.
2. Discussion of the Related Art
In a typical computer system, the operating system, or some portion thereof, generally allows software running within a memory address space to access RAM located on adapter cards via the computer system""s I/O buses.
Some operating systems provide two or more distinct address spaces that can be used by software running on a computer system, one of which is sometimes called the xe2x80x9csystemxe2x80x9d or xe2x80x9ckernelxe2x80x9d address space. This address space is usually designed such that all processes or all threads running on the computer system maintain the same logical view of memory addresses that are in the system address space. Operating systems generally reserve a limited, though sometimes configurable amount of system resources to allow RAM located on adapter cards to be accessed through the xe2x80x9csystemxe2x80x9d or xe2x80x9ckernelxe2x80x9d address space. If the maximum amount of system resources that can be configured on a computer system is not sufficient to allow access to the totality of RAM located on adapter cards, then either the RAM is not accessed at all, or the software needing access to the adapter-based RAM must facilitate accessing sections of adapter-based RAM individually, one at a time, thereby reducing overall system performance.
As a result of the above discussion, the amount of RAM that can be accessed through a system address space is directly proportionate to the amount of system resources allocated by an operating system for such purposes. Hence, a problem with this technology has been that limitations are imposed on the amount of RAM on adapter cards that can be accessed through a system address space because operating systems offer limited system resources to software requesting access to RAM on adapter cards. Therefore, what is required is a solution that obviates this restriction on the amount of RAM on adapter cards that can be accessed through a system address space.
Heretofore, the requirement of the ability to access a maximum amount of RAM located on adapter cards through a system address space while using limited system resources provided by an operating system has not been fully met. What is needed is a solution that addresses this requirement.
There is a need for the following embodiments. Of course, the invention is not limited to these embodiments.
According to a first aspect of the invention, a method comprises: receiving a request to access a memory card address that lies outside a processor access range; scanning a data structure including a list of adapter memory segment offsets, each adapter memory segment offset associated with a memory adapter, for a suitable adapter memory segment offset; determining if a suitable adapter memory offset is available; converting the suitable adapter memory offset to a system address; and providing a processor with access to the suitable adapter memory offset via the system address. According to a second aspect of the invention, a method, comprises: scanning a data structure including a list of adapter memory segment offsets, each adapter memory segment offset associated with a memory adapter, for an empty entry; determining if an empty entry is available; providing access to the empty entry through a system address space; writing a new adapter memory segment offset into the list of adapter memory segment offsets at the empty entry; converting the new adapter memory segment offset to a system address; and providing a processor with access to the new adapter memory segment offset via the system address. According to a third aspect of the invention, a method, comprises: scanning a data structure including a list of adapter memory segment offsets, each adapter memory segment offset associated with a memory adapter, for a removable entry; determining if a removable entry is available; removing the removable entry from the list of adapter memory segment offsets, thus creating an empty entry; providing access to the empty entry through a system address space; writing a new adapter memory segment offset into the list of adapter memory segment offsets at the empty entry; converting the new adapter memory segment offset to a system address; and providing a processor with access to the new adapter memory segment offset via the system address. According to a fourth aspect of the invention, an apparatus comprises: a processor; a memory adapter, coupled to the processor; a memory coupled to the processor; and a data structure, stored in the memory, including a list of adapter memory segment offsets defining a first class of segment offsets and a second class of segment lengths. These, and other, embodiments of the invention will be better appreciated and understood when considered in conjunction with the following description and the accompanying drawings. It should be understood, however, that the following description, while indicating various embodiments of the invention and numerous specific details thereof, is given by way of illustration and not of limitation. Many substitutions, modifications, additions and/or rearrangements may be made within the scope of the invention without departing from the spirit thereof, and the invention includes all such substitutions, modifications, additions and/or rearrangements.